diff --git a/infer/lib/rvcmd.py b/infer/lib/rvcmd.py
index cc65001..32b87d3 100644
--- a/infer/lib/rvcmd.py
+++ b/infer/lib/rvcmd.py
@@ -48,7 +48,7 @@ def check_model(
 def check_all_assets(update=False) -> bool:
     BASE_DIR = Path(__file__).resolve().parent.parent.parent
 
-    logger.info("checking hubret & rmvpe...")
+    logger.info("checking hubert & rmvpe...")
 
     if not check_model(
         BASE_DIR / "assets" / "hubert",
diff --git a/infer/modules/uvr5/mdxnet.py b/infer/modules/uvr5/mdxnet.py
index 02e95a7..31b41f8 100644
--- a/infer/modules/uvr5/mdxnet.py
+++ b/infer/modules/uvr5/mdxnet.py
@@ -239,5 +239,5 @@ class MDXNetDereverb:
         self.pred = Predictor(self)
         self.device = device
 
-    def _path_audio_(self, input, vocal_root, others_root, format, is_hp3=False):
+    def _path_audio_(self, input, vocal_root, others_root, format):
         self.pred.prediction(input, vocal_root, others_root, format)
diff --git a/infer/modules/uvr5/modules.py b/infer/modules/uvr5/modules.py
index dd070fe..8c6d155 100644
--- a/infer/modules/uvr5/modules.py
+++ b/infer/modules/uvr5/modules.py
@@ -36,7 +36,6 @@ def uvr(model_name, inp_root, save_root_vocal, paths, save_root_ins, agg, format
                 device=config.device,
                 is_half=config.is_half,
             )
-        is_hp3 = "HP3" in model_name
         if inp_root != "":
             paths = [os.path.join(inp_root, name) for name in os.listdir(inp_root)]
         else:
@@ -51,7 +50,7 @@ def uvr(model_name, inp_root, save_root_vocal, paths, save_root_ins, agg, format
                 # Check the audio stream's properties
                 if channels == 2 and rate == 44100:
                     pre_fun._path_audio_(
-                        inp_path, save_root_ins, save_root_vocal, format0, is_hp3=is_hp3
+                        inp_path, save_root_ins, save_root_vocal, format0
                     )
                     need_reformat = 0
                     done = 1
diff --git a/infer/modules/uvr5/vr.py b/infer/modules/uvr5/vr.py
index cdc6de8..e4c0f7d 100644
--- a/infer/modules/uvr5/vr.py
+++ b/infer/modules/uvr5/vr.py
@@ -43,7 +43,7 @@ class AudioPre:
         self.model = model
 
     def _path_audio_(
-        self, music_file, ins_root=None, vocal_root=None, format="flac", is_hp3=False
+        self, music_file, ins_root=None, vocal_root=None, format="flac"
     ):
         if ins_root is None and vocal_root is None:
             return "No save root."
@@ -123,10 +123,7 @@ class AudioPre:
             else:
                 wav_instrument = spec_utils.cmb_spectrogram_to_wave(y_spec_m, self.mp)
             logger.info("%s instruments done" % name)
-            if is_hp3 == True:
-                head = "vocal_"
-            else:
-                head = "instrument_"
+            head = "instrument_"
             if format in ["wav", "flac"]:
                 sf.write(
                     os.path.join(
@@ -149,10 +146,7 @@ class AudioPre:
                     opt_format_path = path[:-4] + ".%s" % format
                     downsample_audio(path, opt_format_path, format)
         if vocal_root is not None:
-            if is_hp3 == True:
-                head = "instrument_"
-            else:
-                head = "vocal_"
+            head = "vocal_"
             if self.data["high_end_process"].startswith("mirroring"):
                 input_high_end_ = spec_utils.mirroring(
                     self.data["high_end_process"], v_spec_m, input_high_end, self.mp
@@ -213,7 +207,7 @@ class AudioPreDeEcho:
         self.model = model
 
     def _path_audio_(
-        self, music_file, vocal_root=None, ins_root=None, format="flac", is_hp3=False
+        self, music_file, vocal_root=None, ins_root=None, format="flac"
     ):  # 3个VR模型vocal和ins是反的
         if ins_root is None and vocal_root is None:
             return "No save root."
diff --git a/requirements/amd.txt b/requirements/amd.txt
index 8835b33..81088f7 100644
--- a/requirements/amd.txt
+++ b/requirements/amd.txt
@@ -3,7 +3,7 @@ joblib>=1.1.0
 numba==0.56.4
 numpy==1.23.5
 scipy
-librosa==0.10.2
+librosa>=0.10.2
 llvmlite==0.39.0
 fairseq==0.12.2
 faiss-cpu==1.7.3
diff --git a/requirements/dml.txt b/requirements/dml.txt
index e567fcb..9b8595f 100644
--- a/requirements/dml.txt
+++ b/requirements/dml.txt
@@ -2,7 +2,7 @@ joblib>=1.1.0
 numba==0.56.4
 numpy==1.23.5
 scipy
-librosa==0.10.2
+librosa>=0.10.2
 llvmlite==0.39.0
 fairseq==0.12.2
 faiss-cpu==1.7.3
diff --git a/requirements/ipex.txt b/requirements/ipex.txt
index 0ec0174..5a55fb8 100644
--- a/requirements/ipex.txt
+++ b/requirements/ipex.txt
@@ -7,7 +7,7 @@ joblib>=1.1.0
 numba==0.56.4
 numpy==1.23.5
 scipy
-librosa==0.10.2
+librosa>=0.10.2
 llvmlite==0.39.0
 fairseq==0.12.2
 faiss-cpu==1.7.3
diff --git a/requirements/main.txt b/requirements/main.txt
index 04a7aa8..3f83548 100644
--- a/requirements/main.txt
+++ b/requirements/main.txt
@@ -2,7 +2,7 @@ joblib>=1.1.0
 numba
 numpy==1.23.5
 scipy
-librosa==0.10.2
+librosa>=0.10.2
 llvmlite
 fairseq
 faiss-cpu
diff --git a/requirements/py311.txt b/requirements/py311.txt
index 336d108..6547a80 100644
--- a/requirements/py311.txt
+++ b/requirements/py311.txt
@@ -2,7 +2,7 @@ joblib>=1.1.0
 numba
 numpy
 scipy
-librosa==0.10.2
+librosa>=0.10.2
 llvmlite
 fairseq @ git+https://github.com/One-sixth/fairseq.git
 faiss-cpu